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A stroll down memory lane

My last post (on asynch resets) wasn’t exactly light summer reading. So I thought that, as the summer winds down, I’d give you a break by focusing on a couple of recent EE Times articles that are a bit more fun. (Not that asynch resets can’t be fun…)

The first piece took a stroll down the memory lane of minicomputers, workstations, and early microcomputers. These were showcased – and were the subject of a number of panels – at Vintage Computer Festival West, which was hosted by the Computer History Museum. (Remind me to visit next time I’m in Mountain View.)

Remember minicomputers? Well, yes and no. They were pretty much on the decline by the time I began my professional career as an engineer, and I was never in the business app space where they were so prevalent. But a friend in Massachusetts fondly remembers the days when mini-makers DEC, Wang, Data General, Apollo, and Prime – none of which exist anymore –  were the technology kings (and major employers) of that state. But IBM’s still around and, amazingly, there are still tens of thousands of companies that still rely on their workhorse mini, the AS-400. The article I saw on the event didn’t actually talk about the AS-400, but just the mention of minicomputers put me in mind of it.

More up my alley were the microcomputers – which is what PC’s were originally known as (even though all microcomputers weren’t PC’s…). I loved seeing the picture of this Osborne portable computer. Pretty clunky, huh? And to think that these were state of the art (sort of) back in the day. Anyway, you’ve gotta love the two floppy drives with the storage space for diskettes beneath them. But because the screen and keyboard were all-in-one with the CPU, these computers were, indeed, portable – even though they were so heavy you could hyper-extend your forearm muscles lugging them.

Even more up my alley was the Heathkit which, as the article’s author (Kevin Krewell) pointed out, was “the original Maker micro.” Almost every engineer of a certain age had a Heathkit, or something equivalent.

Anyway, I had a lot of fun paging through this piece, and seeing all these relics. When I looked at the pictures of old-timey computers, it really struck me just how amazing it is when you consider the computing power that all of us carry around with us in our pockets these days. And think of how much we can actually accomplish on a screen that’s even smaller than that Osborne screen! As I said, amazing.

Another EE Times article on a variation of the vintage theme was Alix Paultre’s piece on “Yesteryear’s Measurement Tools.” He found “an assortment of antique electrical measurement tools at a sidewalk flea market” that accompanied the recent PCIM show in Nuremberg, Germany. Check out the Weston Selective Analyzer, which dates from the 1930’s (and which comes from Alix’s personal collection, not from the flea market).

Just as computing devices have become sleeker and more powerful, so have measurement tools become more sophisticated.

But it’s fun to think about the time when the “old timers” were leading edge. Not to mention that, a few decades from now, someone will be reading an article in EE Times on the ancient technology of the early 21st century.

 

Asynch resets. (Some light summer reading…)

I’ll start this post with a small apology.

It’s the dog days of summer. Everyone’s thinking vacation. Or back to school. Or cooling off. Or all three. So this is something of a heavy duty topic to ask you to read up on. But just a few days ago, I came across a three-part article on embedded.com, in with Reuven Dobkin addressed the topic of “Asynchronous reset synchronization and distribution – challenges and solutions.”

These types of resets are used in VLSI designs to ensure that synchronous circuitry is brought to a known state after power up. To do this, the reset operation needs to be coordinated with the logic clock signal to that there are no contention issues between the reset and the clock.

Why tackle this subject? As Reuven explains:

Lack of coordination between asynchronous resets and synchronous logic clocks leads to intermittent failures on power up.

In his series, Reuven shares his insights and provides some valuable guidance:

The drawbacks of classic solutions for reset synchronization (reset tree source synchronization) and distribution (reset tree synthesis) are discussed. Advanced solutions for faster and simpler timing convergence and more reliable reset synchronization and distribution are presented. Different approaches for ASIC versus FPGA designs are detailed.

In Part 1 of his series, Reuven details the drawbacks that asynch reset present, including metastability in flip-flops. Whatever the drawbacks, asynch resets are widely used, so it’s important that engineers fully understand what’s going on with them. (There are a number of pros and cons to both asynch and synchronous resets, and the decision on which method to deploy will depend on the situation, but the article doesn’t delve in too deeply there.) The opening article in the series outlines some solutions.  In Part 2, he goes further, focusing on making sure that asynch reset is done correctly for ASIC and FPGA.  solutions for correct asynchronous reset in ASIC and FPGA. In Part 3, Reuven tackles some special cases to the reset synchronization and distribution problem.

I know, I know. It’s mid-August, and sometimes it’s hard to wrap your mind around material like this. So you might want to bookmark it, and pick it up again in a few weeks when school’s back in session!

Embedded systems? These guys ain’t kidding!

In today’s world, many companies use some sort of electronic security badges for security. But at least one American company is taking a step beyond the plastic badge on a lanyard with a few smarts built in. That company is a Wisconsin tech outfit called Three Square Market, which specializes in microchip technology for micromarkets (self-checkout food vending setups). What Three Square is doing is giving its employees the option of getting an implanted microchip to take care of things that they have been using their badges (or the change in their pockets) for.

With the wave of their hands, employees will be able to open doors that require identification cards, log into their computers, operate copy machines or pay for snacks out of the company’s vending machines, the company said. (Source: NBC News)

Those opting to get implanted will have a microchip injected, via syringe, between their thumb and forefinger.

The chips operate on electromagnetic fields and must be no more than 6 inches from a device that can read them, known as radio-frequency identification.

Not surprisingly, some employees have voiced concerns about privacy and safety. The company counters the objections by pointing out that the technology has been approved by the FDA. Plus, the company’s CEO, Todd Westby points out that:

… the chip isn’t used for tracking people and has no GPS device. Since it’s “passive,” it also can’t be hacked, he added. “The chances of this being hacked into is literally nil to none,” Westby said.

And, of course, it’s optional. (That said, the majority of employees have signed up to get implanted starting August 1.)

A number of non-employees are voicing concerns about this technology. Some of these concerns are coming from religious groups that believe the microchips are the Bible’s Book of Revelation “mark of the beast. Others are coming from those who see this first American foray into subcutaneous microchips in the workplace as a slippery slope. One such of these is Duke computer science Professor Vincent Conitzer.

“If most employees agree, it may become a workplace expectation. Then, the next iteration of the technology allows some additional tracking functionality. And so it goes until employees are expected to implant something that allows them to be constantly monitored, even outside of work,” Conitzer said.

“And unlike with a card, phone or ring, the employee cannot easily and selectively remove the device,” he added. “Now is the right time to have a robust societal conversation about what we would like to see happen, rather than just seeing where things go and then realizing we can’t go back.”

While we’re all about embedded systems, Critical Link isn’t about to start implanting microchips in our colleagues any time soon. And we absolutely don’t want to monitor who’s taking a bio break, or when they go to lunch. We have a lot of snack food in the kitchen, but it’s all free and you don’t need to swipe your badge to get at it.

Still, this is an interesting bit of news, and we’ll be keeping our eye on where things go from here.

Power consumption vs. performance: making tradeoffs

Reuben George addressed this topic with respect to IoT apps in a recent piece on embedded.com.  I’ll summarize Reuben’s article here.

He begins by outlining the three general categories that systems have fallen into: Always On (which are high performance, plugged in apps that draw on an uninterrupted power source); Battery Powered (at the other end of the continuum, these systems run off an on-board battery, and prize power consumption overall); and Battery-Backed Systems (somewhere in the middle, these systems are plugged in, but have battery backup if there’s a power failure; there’s probably a low-end one of these on your bedside table in the form of your clock radio).

But the times, they are a changing:

…a wide range of applications are migrating wired always-on devices to battery-backed or battery powered mobile versions. This new generation of devices — medical, handheld, consumer, communication, industrial – are all driven by the IoT. They are revolutionizing the way devices function and communicate. For such devices, neither the components designed for high performance nor those for low power can meet design requirements. High performance components have high current consumption and thus drain the battery too quickly. Low-power components are not fast enough to handle the demands of these complex devices. There is a need for devices that are both high performance and low power. This is especially critical for memory since a system is truly only as fast as its slowest component, which in many cases is the external memory. (Source: EE Times)

In response, semi manufacturers came up with high-speed MCUs that can drop into “deep sleep” when top performance isn’t needed.

However just optimizing the controller in IoT devices isn’t sufficient to meet their stringent power budgets. During low-power mode, peripherals and memory devices are also expected to save power. The onus of power management has now shifted to memory devices interfaced to such systems.

Reuben then goes on to talk about why SRAMs, despite their limitations – which he details – are used as a cache between MCU and storage memory, and makes the argument that the best approach to balancing the trade-off between performance and power is “Fast SRAM with on-chip power management, ensuring both high-performance and low-power.”

SRAMs with on-chip power management work in a similar way as MCUs with on-chip power management. In addition to active and standby modes of operation, there is a deep sleep mode of operation. Such a setup allows the SRAM to access data at full speed during its standard mode of operation. During the deep sleep mode of operation, the device doesn’t perform any functions and so can keep current consumption extremely low, on the order of 1000 times less than the standard standby consumption of Fast SRAMs.

This argument for Fast SRAMs is not surprising, given that Reuben works for Cypress, and Fast SRAM is an area they focus on. But his article is interesting and a good source for anyone curious about this approach to solving the power consumption-performance trade-off.

By the way, Critical Link is no stranger to implementing sleep mode as a means to save on battery life. Our Mity SOM-335x module’s idle power usage (prior to introducing sleep mode) was 792mW, which was still too much of a battery drain for a custom handheld medical product that we designed. Once sleep mode was introduced, we were able to bring non-operational power usage all the way down to 92mW, which obviously had a major positive impact on battery life.

Hitting the Wall with Moore’s Law

A couple of weeks back, the ACM (Association for Computing Machinery – a throwback name if ever!) held an event celebrating 50 years of ACM A.M. Turing Awards. The Turing is pretty much considered the Nobel Prize for computing, and it would sure have been interesting to be there for its 50th.  As part of the conference that surrounded the awards ceremony, there was a panel on Moore’s Law.

Rick Merritt discussed the panel, “Moore’s Law Is Really Dead: What’s Next?” in an article on EE Times, which I’ll summarize here.

Moore’s Law – which holds that the number of transistors in a dense integrated circuit roughly doubles every couple of years – held up for a good 25 years, but actually began slowing down a decade or so ago. It’s now running up against the limits of physics.

Some panel members believe that Moore’s Law has a few good years left before it EOL’s, and that, for some applications, performance will continue to accelerate. For Doug Burger, who works on FPGA accelerators at Microsoft:

“Moore’s Law gave us a free ride and that’s just about over so we are entering a wild, messy time and it sounds like a lot of fun,” Burger said.

Google’s Norm Jouppi – who is one who believes there’s still some life in Moore’s Law, did note that, overall, “the industry is in denial about Moore’s Law, like the vendor in the Monty Python dead-parrot sketch, who insists a bird is “not dead, it’s just resting.” (Let me save you a google search: here’s a link to the dead-parrot sketch.)

Panelists suggested that “DRAMs could be among the first major components to hit a wall”, and that vertical NAND may fill in “the memory gap left by DRAM.” But it would be best not to bank entirely on it.

Whatever comes next, “will be transformational…20 years from now this industry will be unrecognizable,” said Burger.

One thing that a couple of panelists foresee is that generic architectures will be replaced by “domain-specific architectures” aimed at specific market segments (for those segments big enough to support an architecture of their own). Another prediction was that we may be seeing some vertical integration in computing companies “that design everything from silicon to apps.” Apple is one example of a company that appears on this track, with Google up next. This won’t close out the silicon vendors, however. Another thing noted was the free ride that software developers got by being isolated from chip changes by the instruction set architecture is about to end.

What will replace Moore’s Law? Quantum computing, which we recently posted about.

“The good news from a physics perspective is [quantum systems] are amazingly close to being real. A 50-100 qubit machine could be available in a year or two and some say they will write programs for them delivering a speed up over classical systems,” [Princeton’s Margaret] Martonosi said.

The bad news is so far only a few narrow apps are known for such systems. “There’s a huge gap between the number of qubits needed [for many broad apps] and the number we can build into reliable systems anytime soon… it’s not clear who will pay [for systems with thousands of qubits] and for what apps,” she added.

Sounds like an interesting panel. And sounds like we’re in for what might be a wild and messy ride. If we want to take our minds off of it, we can always replay the dead-parrot sketch…

Quantum Computing’s Breakthrough

I’m just catching up on some reading, and one of the things I’m just catching up on is the MIT Technology Review for March/April 2017.  Each year, they feature what they view as the greatest tech breakthroughs of the prior year, and one of the technologies that made the cut this year was “the fabrication of stable qubits, the basic unit of quantum computers.” As a result of this breakthrough, quantum computers will become not only wildly more powerful, but more practical as well.

The Tech Review article notes that, for a while now, they’ve been looking at quantum computing as a possible candidate for their annual breakthrough list. And, until now, they’ve decided ‘not quite yet.’

This year, however, a raft of previously theoretical designs are actually being built. Also new this year is the increased availability of corporate funding—from Google, IBM, Intel, and Microsoft, among others—for both research and the development of assorted technologies needed to actually build a working machine: microelectronics, complex circuits, and control software.

If you’re not familiar with quantum computing, it has its center, has the quantum bit (qubit), “a basic unit of information analogous to the 0s and 1s represented by transistors in your computer.” Only much more powerful. That’s because they can simultaneously represent both 1 and 0, and because of something called quantum entanglement, through which qubits can affect other qubits, even when they’re not physically adjacent. “That lets quantum computers take shortcuts to the right answers in certain types of calculations.”

With their tremendous computational power will be used for applications that use large numbers. Those apps include encryption, AI, complex scheduling, materials science, and pharma research.

What’s held quantum computing back is how sensitive they are to “the slightest disturbance, like vibrations or fluctuating electric fields.” That sensitive makes it difficult for qubits to maintain their ability to represent both 1 and 0, and to achieve entanglement. Having qubits that aren’t subject to breaking down will decrease power requirements and let quantum computers more easily scale.

The stable qubits are still on the horizon. They won’t be available for another 4-5 years. So far, researchers have achieved stability for five-qubit computers, and have test systems at the 10- to 20-qubit level that aren’t quite so stable. The real computational breakthrough – taking quantum computers beyond what classical supercomputers can do – will come when stable 50 qubit computers are achieved.

Eventually, expect 100,000-qubit systems, which will disrupt the materials, chemistry, and drug industries by making accurate molecular-scale models possible for the discovery of new materials and drugs. And a million-physical-qubit system, whose general computing applications are still difficult to even fathom? It’s conceivable…

This is above and beyond – way above and beyond – what our applications need in terms of their computational power. But we have also seen remarkable increases in what our SoMs can do. Whether we’re talking about quantum computing or DSP, FPGA, and ARM boards, all I can say is that someday we’ll take today’s breakthroughs for granted!

Where electronics is headed (Part II)

In my last post, I summarized the first six views from 12 Views on the Future of Electronics an EE Times roundup of what was on the minds of speakers at the recent Imec Technology Forum.  Here’s my summary of the second six views. (All the titles/headers are Rick Merritt’s; he’s the author of the original roundup.)

Future systems open AR, VR doors
Kazumasa Nomoto of Sony – he’s their chief user interface researcher – spoke about virtual reality and augmented reality, which he views as the way in which “we interact with tomorrow’s large-screen and mobile devices, respectively.” The technology to support this isn’t quite here yet. For VR, what’s needed is a higher rez screen with faster frames per second display, improved color support, and “better sound and haptics support with natural input devices.”

Making wires out of thin air 
Marcus Weldon, the president of Bell Labs, spoke about wireless beam forming, saying that with it, “we’re creating the equivalent of wires in the air.” This is based on pretty much all links using “some form of EFDM and QAM modulation with forward-error correction.” And he provided a schematic to illustrate his point.

Is it just me, or is there something comforting about seeing a schematic that looks sort of old school?

Duo makes a 100G serial link
BiFast is a startup where Timothy Keulenaer and Arno Vyncke have designed “two tiny ASICs that fit on the end of an active cable. The transmit-and-receive chips merge four of today’s 25G lanes into a single 100G serial lin for the fat pipes inside data centers. They’re taking a different – and more cutting edge – approach than far bigger and household name players. Recent university grads, they’re looking for investors. (Good luck, fellows!)

16 antennas form beams at 60 GHz
Imec, which is located in Belgium, is an R&D center focused on nanoelectronics and digital technologies. At their conference, they introduced “a working 60-GHz system including a baseband chip and an array of 16 antennas for wireless beam forming.” And they’re upping the ante, working on a 256 antenna array version.

Powering up new paths to cellular IoT
Another area where Imec researchers showed off their work is the IoT, specifically in the emerging market for Narrowband IoT. They’ve got a test board with “a 40-nm power amplifier with a 27-dBm peak. It’s the first of a set of blocks to include an all-digital PLL, ADCs, and sub-GHz analog front-ends that they aim to complete and integrate into an SoC by sometime next year.”

Software scales legacy video to HDR
Researchers at Ghent University are working on “algorithms that will scale existing content to HDR.” With television manufacturers now building in high dynamic range capabilities, this is a welcome development. Philips for one is deploying parts of Ghent’s algorithms in FPGAs. While I may like those old school schematics, I’m definitely on board with improving the television picture.

Bottom line: this looked like an interesting conference, with a lot of interesting things going on.

Where electronics is headed (Part I)

There’s always something interesting on EE Times, and just the other day that something was a roundup by Rick Merritt of what the speakers at last week’s Imec Technology Forum had to say. (Imec is an R&D center focused on nanoelectronics and digital technologies.)

My interest began with the headline – 12 Views on the Future of Electronics – and was really piqued by the first of those 12 views: “Neural processors overtake CPUs, GPUs.” Well, not so fast on CPUs being overtaken, but it’s always interesting to see what the industry thinkers and doers are up to.

Neural processors overtake CPUs, GPUs
Kinam Kim heads up Samsung’s semiconductor business. His comments (IMHO) are colored by his business. Nonetheless, it’s worth hearing what he has to say:

Kim predicted that the DRAM and NAND technologies that Samsung dominates will continue to evolve. But he suggested that neural-network processors will disrupt the CPU and GPU architectures of rivals Intel and Nvidia.

Microsoft builds AI plug-ins
Peter Lee, who heads up Microsoft Research, quite naturally used Microsoft’s Powerpoint to illustrate his talk. But he was using “an early version of Powerpoint that supports real-time transcription. Halfway through his talk, the feed shifted to automatically translate his comments into Dutch.” He predicts that AI will be built into all sorts of applications.

Sprinkling machine learning everywhere
Imec’s Praveen Raghavan spoke about an emerging capability that will let neural networks learn “in the field.”

To get there, Raghavan and colleagues have defined what they believe is the most cost- and power-efficient architecture for machine learning (below). It uses separate arrays of XNOR transistors and MRAM cells, storing one bit in each cell of the array.

While not using neural nets as such, the chip performs similar kinds of tasks. The trade-off is that the one-bit math it uses is less precise than most neural nets, requiring more arrays with more hierarchies, he said.

The stimulating mysteries of the brain
Tim Denison is the VP of research at Medtronic. He reported on his work on an implanted 120-Hz stimulator used to help those with Parkinson’s control their tremors. Although the implants are proving to be effective, Denison points out that researchers still don’t understand how the brain works. So they’re using the implants as a tool to find out more. “The work is part of an evolving field of neural prosthetics that ‘we think of as reconstructing the nervous system.’” All very promising, as is the fact that researchers exploring multiple different diseases are using cloud services and shared toolkits so that findings are available in near real-time to those working in similar areas.

Photonic chips shrink medical test gear
Another Imec researcher, Paru Deshpande, is working on creating photonincs devices in silicon. “The chips aim to replace relatively bulky, expensive optical components in today’s desktop-sized medical test systems so they can evolve into tomorrow’s handheld units.”

Packing smarts in wearable patches
Wearables are much in the news these days. Mario Konijnenburg showed off the 55-nm third gen MuselC, which “is the first in the family to incorporate flash (384 Kbytes), support for Bluetooth Low Energy, a Cortex M4 class processor, and encryption.”

We’ll be back with the next six futures in two weeks time.

Left-hand turns: a challenge for self-driving cars

The elderly mother of a friend of mine lives in Florida, and John visits her several times a year. Mrs. W. saves up a number of errands for John to drive her on: all the ones that require a left- hand turn against oncoming traffic.

Left hand turns are hard, even for those of us who aren’t in our 80’s. The US DOT did a study of car crashes and found that there were nearly twenty times as many accidents on left-hand turns as on right-hand ones. If the task is difficult for us humans, it’s especially tough for self-driving cars.

I read about this in a recent article by Hiawatha Bray, who writes about technology for The Boston Globe. The article made the point that the left-hand turn is one of most difficult challenges that automotive engineers are dealing with. It’s a complex situation: there may be cars coming at you, and you (or your self-driving car) need to calculate speed and distance. Then there’s gauging whether there’s enough space for you to pull in and out of the way of oncoming traffic when you make your turn. Plus there’s figuring out what any pedestrians in your path may be up to. Some of these are technical problems – calculating speed and distance – that can be solved with technology. For self-driving cars, equipped with GPS navigation, cameras, laser rangefinders and radar, getting the speed and distance right for the vehicles in the vicinity of the left turn is relatively simple.  But what technology can’t do is figure out what the cars are likely to do next. Not to mention figure out what those pedestrians are up to.

Left turns are so tough because they involve psychology as well as technology. Drivers and pedestrians read subtle signals from each other as they approach an intersection. We’ve come to learn how to read those signals to make pretty good guesses about when it is safe to turn left in a variety of traffic conditions.

“Human beings are remarkably good at that, because we’re social beings,” said Gill Pratt, chief executive of the Toyota Research Institute, an organization founded by Japanese carmaker Toyota Corp. to solve critical problems in automotive and robotic technology.

But today’s automated cars don’t know how to read people–and people don’t know how to read them. As a result, said Pratt, building cars that can safely negotiate all kinds of left turns will take years—perhaps more than a decade. (Source: Boston Globe)

It’s not that self-driving cars are going to crash into other cars or mow pedestrians down.

When one of them can’t decide what to do, it will simply stop. But that could lead to traffic jams at busy intersections. It could also cause accidents, as frustrated human drivers try to cut around a hesitant autonomous car, only to plow into oncoming traffic.

And the problem will cut both ways. Without being able to make eye contact with a driver, how will pedestrians – and in Boston, I understand that means jaywalkers – know whether it’s safe to cross?

According to the article, self-driving cars that can safely make a left-hand turn are five to ten years away.

Until then, I guess my friend John will have to keep running those left-hand turn errands for his mom.

Juicero: proof positive that technology isn’t the answer for everything

I’m not sure how long the term Internet of Things (IoT) has been around, but it’s only gained noticeable traction in the last few years – likely when it began involving consumer products. Prior to that, there were plenty of interconnected devices in the scientific, industrial, medical, transportation, defense, and other worlds in which Critical Link technology plays. But, as I said, the term started becoming more prevalent once there were “things” for consumers involved.

Some of the earlier consumer-based IoT applications were both interesting, and in my opinion, sensible and even important. It really does make sense to be able to remotely monitor and control your home security or heating/cooling set up. And I’d argue that fitness trackers also fall in the sensible and useful category.  Some of the other applications…well, maybe not so much.

Who wants/needs/will pay for a refrigerator that sends you an alert when your milk’s about to expire? Maybe there’ll come a day when we’ll just take this type of app for granted, but for now, it seems sort of silly: technology in search of a problem that doesn’t really exist.

And sometimes it appears that it’s investment money in search of a “winner” that’s nothing more than not-so-useful technology in search of a non-problem. That’s the case with Juicero, which has been getting a lot of LOL press of late.

If you’ve missed the news on Juicero, they’re a silicon startup that managed to attract a ton of VC money ($120M) from the likes of Google and Kleiner Perkins. Those are smart money names, aren’t they?

Juicero produces a machine that makes juice. But it’s not just any old juice. Their model is that folks buy – from them, or course – packets of organic fruits and veggies. These short-shelf-life packets are then squeezed into juice by the Juicero juicer. The packets – if I’ve got this correct: it seems pretty exorbitant to me – cost between $5 and $8 per for a single serving. And they can only be squeezed using a Juicero juicer, which costs $400 (down from an initial price of $700).  The idea was Keurig-like: the company would get upfront money for the juicer (the razor) and ongoing money for the packets (the blades).

The Juicero has a crazy amount of technology in it, and, so far, you’re probably wondering what an expensive juicer and pricey bags of juice ingredients have to do with the IoT.

Well, some of the technology included in the Juicero is a scanner that reads the QR code on the juice packets. And some of the technology enables a Wi-Fi connection so that you can be alerted on your iPhone or Android that the juice packet you’re about to squeeze has expired or been recalled. Hmmm. Seems to me that $400 for a juicer and $5 to $8 for a juice packet is a lot to pay to figure out whether your juice ingredients are rotting.

(Remember in the old days, when you just opened the fridge, took out the carton of OJ, and looked at the expiration date? Or even the old-old days when you opened the fridge, took out the carton of OJ, and gave it the sniff test to figure out whether you should drink it or pour it down the sink? Some days I feel so old…)

But the real kicker isn’t that this all seems like sort of a dumb application. The real kicker is that, as it turns out, the Juicero isn’t the only option you have for extracting juice from the packets. You can use your bare hands.

Bloomberg performed its own press test, pitting a Juicero machine against a reporter’s grip. The experiment found that squeezing the bag yields nearly the same amount of juice just as quickly—and in some cases, faster—than using the device… Reporters were able to wring 7.5 ounces of juice in a minute and a half. The machine yielded 8 ounces in about two minutes. (Source: Bloomberg)

You know, sometimes technology really isn’t the answer to everything.