Is it just my imagination, or are there fewer news articles on DSP these days?
At Critical Link, we’re – of course – quite partial to DSP. Many of our clients have deployed System on Modules that contain DSP. And way back in the day (about a decade back in the day), our original SoM, which we then called a customizable CPU platform, was the MityDSP. Since then, we’ve developed a wide range of SoMs, and the market focus has certainly shifted to ARM, but we still have a number of variations on the MityDSP in our product family (including embedded in some of our imaging systems). So I was happy to see good old DSP in the news.
The article I saw a few weeks back was on Cadence Design Systems, which is promoting its approach to neural networks.
“Cadence maintains that neural networks deployed in embedded systems that are built on programmable digital signal processor (DSP)-based SoCs offer advantages in power consumption, performance and time to market compared with networks built on CPUs or combinations of CPUs and GPUs.” (Source: embedded.com)
The reason? DSP-based neural technology – that would be Cadence’s Tensilica Vision, which is designed for vision/deep learning applications – doesn’t run as hot as a graphics processing unit.
“’Our value add is always going to be in the low-power, high-performance and highly energy efficient product,’ [Pulin] Desai [director of product marketing for Cadence’s Imaging/Vision said. ‘Most of the GPU type of products were developed to do classical 3D image processing and they were developed to do a lot of activities in floating point and to do multiple threads at the same time. At the end of the day they are not power efficient based on a lot of these reasons.’”
Even further back in the day I was exposed to the early days of Neural Networks during some of my course work for my Master’s Degree in Computer Science. Now, the technology may have changed drastically, as it has evolved since then. But at that time it was built upon a large set of massively parallel yet very simple processing engines (the neurons) that passed very small amounts of data (coefficients) from one neuron to a few of its neighbors. (Sounds like great work for an FPGA to me!)
Cadence’s DSP based architecture allows for highly parallel processing (note the VPUs with 256 MACs, the Scalar Processing Units and the additional optional VFPUs) with engines that can, perhaps, execute a much more intricate core neuron algorithm.
Anyway, I’m just happy to see something about DSP making headlines again. Seems like it’s been a while.